1. Digital system design with SystemVerilog
Author: Zwolinski, Mark
Library: Central Library of Sharif University of Technology (Tehran)
Subject: ، Verilog )Computer hardware description language(,، Electronic digital computers-- Design and construction,، Computer simulation
Classification :
TK
7885
.
7
.
Z86
2010


2. RTL modeling with SystemVerilog for simulation and synthesis using SystemVerilog for ASIC and FPGA design /
Author: Stuart Sutherland.
Library: Center and Library of Islamic Studies in European Languages (Qom)
Subject: Computer simulation.,Electronic digital computers-- Design and construction.,Verilog (Computer hardware description language),Computer simulation.,Electronic digital computers-- Design and construction.,Verilog (Computer hardware description language)
Classification :
TK7885
.
7
.
S874
2017


3. SystemVerilog assertions and functional coverage
Author: / Ashok B. Mehta
Library: Central Library, Center of Documentation and Supply of Scientific Resources (East Azarbaijan)
Subject: Engineering,Circuits and Systems,Electronics and Microelectronics, Instrumentation,Processor Architectures,Verilog (Computer hardware description language),Electronic digital computers, Design and construction,Integrated circuits, Verification,TECHNOLOGY & ENGINEERING / Mechanical, bisacsh
Classification :
E-BOOK

4. SystemVerilog for desig
Author: / by Stuart Sutherland, Simon Davidmann, Peter Flake
Library: Central Library and Document Center of Shahid Chamran University (Khuzestan)
Subject: Verilog (Computer hardware description language),Electronic digital computers--Design and construction,Computer simulation.
Classification :
TK
,
7885
.
7
,.
S875
,
2006


5. SystemVerilog for design :
Author: / by Stuart Sutherland, Simon Davidmann, Peter Flake
Library: Central Library, Center of Documentation and Supply of Scientific Resources (East Azarbaijan)
Subject: Verilog (Computer hardware description language),Electronic digital computers , Design and construction,Computer simulation
Classification :
E-BOOK

6. SystemVerilog for design
Author: / by Stuart Sutherland, Simon Davidmann, Peter Flake
Library: Central Library and Information Center of the University of Mohaghegh Ardabili (Ardabil)
Subject: Verilog (Computer hardware description language),Electronic digital computers- Design and construction,Computer simulation
Classification :
TK7885
.
7
.
S875
2006


7. SystemVerilog for design
Author:
Library: Central Library and Documents Center of Mazandaran University (Mazandaran)
Subject: Verilog (Computer hardware description language) ; Electronic digital computers ; Design and construction. ; Computer simulation. ;

8. SystemVerilog for design
Author: / by Stuart Sutherland, Simon Davidmann, Peter Flake
Library: Central Library, Center of Documentation and Supply of Scientific Resources (East Azarbaijan)
Subject: Verilog (Computer hardware description language),Electronic digital computers- Design and construction,Computer simulation
Classification :
E-BOOK

9. SystemVerilog for design :
Author: by Stuart Sutherland, Simon Davidmann, Peter Flake ; foreword by Phil Moorby
Library: Center and Library of Islamic Studies in European Languages (Qom)
Subject: Computer simulation,Electronic digital computers-- Design and construction,Verilog (Computer hardware description language)
Classification :
TK7885
.
7
.
S876
2006

